Conventional LCD panel drivers have in the past been derived from controllers designed for cathode ray tubes (CRTs), which are designed to provide a constant pixel output and which thus require a uniform data transfer. Consequently these have been synchronous devices requiring permanent clocks and fast memory access. With more complex displays requiring higher bandwidth, an increasing proportion of the gate count becomes dedicated to generating the clock signals and maintaining stability of the clock signal throughout the circuit. This contributes significantly to the power consumption of the display system. Also, most CRT controllers and the LCD drivers derived therefrom are built with backwards compatibility so that the display can handle earlier graphics adapters, and this means that, whilst a significant proportion of the logic is not actually used in most applications, this still contributes to the gate count. The synchronous operation also places rigid constraints on the timing of memory access and may necessitate the use of fast and expensive memory such as VRAM if the host or other memory interfaces require rapid memory access, or if there are increased numbers of other interfaces, such as a pen interface, an image decompression unit, a video source, another host or another display. There exist computer graphics systems which attempt to provide greater flexibility and access by the host by providing a frame or half-frame buffer, often referred to as a "frame accelerator", which receives data from the device memory before it is sent to the display, and which acts as a buffer between host accesses and the display access. However, these systems require additional memory which increases their cost. EP-A-0228135 describes an arrangement for programmable sharing of display memory between a CRT display and one or more other resources. In this arrangement, the data transfer is essentially synchronous and, in certain modes, display process and update accesses to the memory may be interleaved under software control.
As portable computing appliances become more widespread, there is a growing need for low power consumption display controllers which can use a moderate speed memory whilst providing a good level of memory access to other memory users, and which can be manufactured relatively economically, without requiring significant amounts of additional memory.